Submitted by ben on Mon, 10/18/2010 - 17:18
I built this board to test the DAC and antialiasing filters for my function generator. It plugs into the Digilent XC3S1600E board (no longer sold, but this will probably work). The DAC is driven by the FPGA at 200MSa/s.
PCB Layout Read more »
Submitted by ben on Mon, 10/18/2010 - 17:16
This is an old Nintendo-style side-scrolling game written entirely in VHDL. There is no microprocessor. The hardware consists of: Read more »
Submitted by ben on Mon, 10/18/2010 - 17:15
I salvaged this screen from a dead copier. It has a CCFL backlight with a seperate inverter and a 10-pin connector. It has two possible part numbers printed on it: CCL-E145V and 56AAA1357B. I could not find any information on the display itself, but I found the datasheets on the chips and from that figured out the required timing. The display has one M5839B and three M5260 driver chips. The screen's resolution is 192x64. Read more »
Submitted by ben on Mon, 10/18/2010 - 17:14
Submitted by ben on Mon, 10/18/2010 - 17:13
I'm specifically talking about LCD screens with drivers but no controller, which means that they must be constantly refreshed by control circuitry. Having built-in drivers means that you don't have to provide circuitry to switch the weird voltages that the actual elements need. These screens are available from surplus electronics places and, for a (much) higher price, new from the usual suppliers.
These displays require almost the same signals as a VGA monitor, with a few differences: Read more »
Submitted by ben on Mon, 10/18/2010 - 17:11
Do I have to use that IDE if I'm just doing VHDL/Verilog?
Since the important parts of ISE WebPack are actually the command-line compiler tools, there is no need to use Xilinx's development environment if you can handle the build process. This is much more bulky than compiling software, and a lot of intermediate files are generated. To simplify the process, here is a template Makefile for compiling Verilog or VHDL source into bitstreams for Virtex and Spartan chips: Makefile Read more »
Submitted by ben on Mon, 10/18/2010 - 16:42
This board downconverts and digitizes the FM broadcast band. It connects to the Digilent S3E-1600 board which selects a channel and sends the IF over Ethernet to a computer which demodulates the audio.
The sample clock is produced by a CY22150 clock synthesizer connected to J4 on the S3E-1600 board. Read more »
Submitted by ben on Mon, 10/18/2010 - 16:41
This is an 80MHz function generator inspired by the Agilent 33250A. It supports waveforms up to 64k samples with 14-bit output resolution. The output level is only 1Vpp. Read more »
